This upper limit depends on process, layout, power design and power limits of the CPU.
Last but, not the least, not all CPUs are created equal on a wafer. I came from an era where we hunted plain blue AMD Athlon dies for higher overclocking potential, since they were from center of the wafer and they were more stable under high load/voltage/clock. I had a 2200MHz Athon (200 x 11) which was faster then AMD's own 2200MHz Athlons, since AMD wasnt offering a 200MHz bus version of their 2200MHz parts.
That's not too bad. I'd be much more worried about code silently doing the wrong thing .
The BSOD, oops, or panic is a symptom of widespread errors.
Also, a BSOD or panic in the wrong time can cause massive data loss. That's beyond bad sometimes.
Edit: I mixed Prime95 with SuperPi. Thanks AaronFriel.
It's because the code does the wrong thing, and that happens silently... until it hits some pointers or kernel structures and stops being silent.
If the processor fires an unrecoverable MCE event, you're frozen with a nice, explanatory panic.
Center of a silicon wafer is said to be have a higher quality (due to lithography, physical stresses and other processes which I don't know exact details of), and the result is a die with more homogeneous properties and color reflection. Since the die's tolerances were lower around the center of the wafer, the performance of the resulting chip was better.
AMD was also sub-binning most of these parts (they were sold as Athlon 1700 @ 1433MHz regardless of their performance level), so people were buying these unlocked sleepers and overclocking them to insane levels without voltage increases.
However, today the processes is so different and node sizes are so small that the dies' color are different and not perceivable anyway.
In the older days, this issue was more of an obscure, collective wisdom which resulted from trial and error days of overclocking wars.
CPUs are basically huge networks of transistors (on/off switches). They're sort of like tiny printed circuit boards; lots of individual 'parts' are connected by 'wires' on top of a silicon wafer.
The distances are miniscule, but the lengths of wires running between transistors still varies. So when a transistor switches between 'off' and 'on', the signal takes a different amount of time to reach to its destination depending on which transistors are being switched. The signal can also feed into multiple other transistors which it will reach at different times.
While signals are busy propagating through the circuit, the CPU's state will be unstable, including the 'output' value of its current instruction. The time that it takes for any given instruction to stabilize is tough to predict because it depends on a lot of things, including how far apart the transistors are and how many of them the signal needs to pass through.
The CPU's "tick rate" in Hertz relates to how quickly it "latches" its internal state. Between "ticks", the CPU waits for all of the signals to stabilize. If they haven't stabilized when the clock strikes, bad things can happen.
I'm not sure how the 'quality' of an individual chip can make it more amenable to overclocking, though; maybe they run into fewer issues from thermal stress? Maybe the tiny 'wires' between the transistors have slightly less resistance? I dunno, someone help me out?
https://devblogs.microsoft.com/oldnewthing/20050412-47/?p=35...