That's not too bad. I'd be much more worried about code silently doing the wrong thing .
The BSOD, oops, or panic is a symptom of widespread errors.
Also, a BSOD or panic in the wrong time can cause massive data loss. That's beyond bad sometimes.
Edit: I mixed Prime95 with SuperPi. Thanks AaronFriel.
It's because the code does the wrong thing, and that happens silently... until it hits some pointers or kernel structures and stops being silent.
If the processor fires an unrecoverable MCE event, you're frozen with a nice, explanatory panic.
Center of a silicon wafer is said to be have a higher quality (due to lithography, physical stresses and other processes which I don't know exact details of), and the result is a die with more homogeneous properties and color reflection. Since the die's tolerances were lower around the center of the wafer, the performance of the resulting chip was better.
AMD was also sub-binning most of these parts (they were sold as Athlon 1700 @ 1433MHz regardless of their performance level), so people were buying these unlocked sleepers and overclocking them to insane levels without voltage increases.
However, today the processes is so different and node sizes are so small that the dies' color are different and not perceivable anyway.
In the older days, this issue was more of an obscure, collective wisdom which resulted from trial and error days of overclocking wars.
This upper limit depends on process, layout, power design and power limits of the CPU.
Last but, not the least, not all CPUs are created equal on a wafer. I came from an era where we hunted plain blue AMD Athlon dies for higher overclocking potential, since they were from center of the wafer and they were more stable under high load/voltage/clock. I had a 2200MHz Athon (200 x 11) which was faster then AMD's own 2200MHz Athlons, since AMD wasnt offering a 200MHz bus version of their 2200MHz parts.