Wrapping around sides isn't easy because chips are cut from a single large wafer pretty late in manufacturing. The sides aren't exposed until the end.

Besides, it won't help much. Usually when people want to shrink chips, it's often because shorter links. This means lower latency (ie faster) and lower heat loss. Wrapping or stacking doesn't help those.

It's a manufacturing limitation. Integrated circuits are nearly universally built via photolithography [1], which only makes flat 2D layers. Stacking many, many layers for 3D circuits is feasible; building layers on different sides of an object would require re-engineering every part of the process, including the use of large silicon wafers, for a much more complex process with negligible (if any) benefit.

[1] https://en.wikipedia.org/wiki/Photolithography#Basic_procedu...

edit: kragormonkey beat me to it!