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Re:ARM: “RISC-V Architecture: Understand the Facts” by jchw on Monday July 09, 2018 @09:40AM (#17490049)
Some of the "facts" here are pretty weak. The "years of security expertise" is not really a feature I'd be proud of given the recent processor-level vulnerabilities that in fact, paint a very different picture about how traditional processor vendors treat security.

Even if there is some validity here, this is in surprisingly poor taste. I've known people who have worked for ARM. I wonder what they think about this.

Re:ARM: “RISC-V Architecture: Understand the Facts” by vardump on Monday July 09, 2018 @11:10AM (#17490771)
While I wouldn't choose a new architecture so eagerly, existence of this page (if real) does to some extent validate RISC-V as a potential solution.

Instead, of say, ARM M4+, A7, A53/A55, etc.

Re:ARM: “RISC-V Architecture: Understand the Facts” by blablabla123 on Monday July 09, 2018 @11:49AM (#17491120)
Yeah, this years of security scrutiny argument is getting disproved. The recent processor vulnerabilities are one example. Another is how big corporates treat internal software: upgrade rarely and test very extensively. This has proven very fatal: WannaCry wouldn't have been possible if people had been at least updating to the most recent release and update.

I'd be happy to try out a RISC computer, actually it's quite sad that the CPU diversity got so little due to Intel/AMD.

Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @11:08AM (#17490741)
OoO risc-v processors are also vulnerable to spectre...
Re:ARM: “RISC-V Architecture: Understand the Facts” by wlesieutre on Monday July 09, 2018 @11:26AM (#17490920)
RISC-V foundation says not:

>No announced RISC-V silicon is susceptible, and the popular open-source RISC-V Rocket processor is unaffected as it does not perform memory accesses speculatively.

https://www.techpowerup.com/240310/risc-v-foundation-issues-...

Do you have a source?

Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @11:33AM (#17490982)
The rocket core isn't OoO, they even say so...
Re:ARM: “RISC-V Architecture: Understand the Facts” by wlesieutre on Monday July 09, 2018 @12:00PM (#17491208)
It says right there "No announced RISC-V silicon is susceptible."

Does someone actually make a RISC-V processor with out of order execution? Or is this a "They're going to make one eventually, so they'll have to address Spectre attacks before that happens" problem?

Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @12:31PM (#17491447)
Yeah, no shit, because there's no major RISC-V silicon that's OoO. If you solely look at ARM cores that don't speculate, then ARM cores aren't vulnerable either.

Also pretty sure BOOMv2 has been taped out: https://content.riscv.org/wp-content/uploads/2017/12/Wed0936...

Re:ARM: “RISC-V Architecture: Understand the Facts” by Symmetry on Monday July 09, 2018 @03:04PM (#17492603)
Well, the A8 was vulnerable despite being in order but it was a mediocre design with an unusually long pipeline for a core of its class. Of course even in order core speculate a little based on predicting branches and their pipeline lengths but there's a very limited window for things to go wrong without going OoO and almost all in order cores can't execute enough dependent instructions to leak data without realizing they took the wrong branch.
Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @08:37PM (#17494552)
Yes, to be more precise, anything doing anything speculative with memory.
Re:ARM: “RISC-V Architecture: Understand the Facts” by snvzz on Monday July 09, 2018 @11:22AM (#17490882)
Which RISC-V processors?
Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @11:26AM (#17490918)
Any of them unless they have specific modifications for mitigation.
Re:ARM: “RISC-V Architecture: Understand the Facts” by deepnotderp on Monday July 09, 2018 @01:34PM (#17491923)
Any of them that uses speculative execution to be clear, if it wasn't apparent.
Re:ARM: “RISC-V Architecture: Understand the Facts” by snvzz on Tuesday July 10, 2018 @12:16AM (#17495430)
Potentially.
Re:ARM: “RISC-V Architecture: Understand the Facts” by cptskippy on Monday July 09, 2018 @09:49AM (#17490096)
How would an open source processor be better from a security perspective? I might still be a little shell shocked from my attempts to setup a MythTV Box 10 years ago but this is what's running through my head:

"Did you RTFM?"

"Debain CPU doesn't have that issue."

"Just disable the ALUs in firmware, they're not necessary in modern processors anyways."

"That's been patched, just download processor v2.3.4.432 and send it to your FAB, they should spin you a new CPU in 8-12 months."

Re:ARM: “RISC-V Architecture: Understand the Facts” by snom380 on Monday July 09, 2018 @10:37AM (#17490445)
While the comparison to MythTV for a fun coment, this is exactly what ARM would like the high level decision makers to feel. Just as Microsoft tried with their "get the facts" campaign years ago.

Notwithstanding your terrible MythTV experience, there's seveal companies offering commercial support for Linux today, and a lot of effort has been put into making it as secure as the Windows equivalent. I suspect the same could happen with RISC-V.

Re:ARM: “RISC-V Architecture: Understand the Facts” by cptskippy on Monday July 09, 2018 @09:08PM (#17494694)
Another comment mentioned Western Digital switching to RISC-V which makes a lot of sense and that's about it. I'm struggling to see how RISC-V would improve the situation with edge devices or personal computing devices where the implementations will probably end up being propriety in nature and beholden to the vendor for any updates.

Even when we do get something like a custom ROM for a router or smartphone it will still be reliant on custom kernel modules or other lock-ins hindering open source support.

It just feels like more of the same with a chance for ODMs to save some on the BOM while not passing the savings on to us.

I guess it's just hard to get excited about it without seeing some sort of benefit to the end user. That doesn't mean I feel like we should stick with ARM or x86, I frankly don't care.

Re:ARM: “RISC-V Architecture: Understand the Facts” by justinjlynn on Monday July 09, 2018 @09:51AM (#17490109)
All of that sounds better than: "Oh, our new processors don't have that issue. Trust us, pay me. Oh, you just bought one? Too bad."
Re:ARM: “RISC-V Architecture: Understand the Facts” by cptskippy on Monday July 09, 2018 @10:15AM (#17490299)
It sounds about the same.
Re:ARM: “RISC-V Architecture: Understand the Facts” by redshirt on Monday July 09, 2018 @11:30AM (#17490950)
yes, it does.
Re:ARM: “RISC-V Architecture: Understand the Facts” by jchw on Monday July 09, 2018 @10:08AM (#17490243)
Some open source projects are different. A lot of them do not cater to end users directly. But if you want to talk about open source security, take a look at how OpenBSD handles issues; they definitely aren't messing around.
Re:ARM: “RISC-V Architecture: Understand the Facts” by cptskippy on Monday July 09, 2018 @10:29AM (#17490385)
That's all true, I'm just wondering how things would be different if everyone were using an Open Source CPU vs what we have today.

If everyone is running the same CPU design but sourced from different manufacturers who had them spun up at different fabs, how would that affect support? Today we have one or two device manufacturers we rely on for support and answers about if security fixes can be done in firmware vs requiring a hardware fix. We can pull the CPU ID of our system and then check with AMD or Intel for an authoritative answer. What does that look like when anyone can manufacture a chip?

Will there still end up being one or two predominant CPU manufactures for desktop/mobile/server CPUs to simplify support? Are we going to have to rely on OEMs to support the CPUs they put in their machines?

I'm fearful we might end up in a situation similar or worse to what we have with Android where smartphones are shipped in their final state and never receive anything beyond failure support from the OEM/ODM.

Re:ARM: “RISC-V Architecture: Understand the Facts” by snom380 on Monday July 09, 2018 @11:00AM (#17490655)
That's the case today: ARM CPUs are sourced from different manufacturers and packaged together with other cores into SoCs, which have wildly varying support from their vendors. Some of these processors also have custom extensions. If you're worried about chip security when anyone can manufacture a chip, then sorry, we're already there, and RISC-V doesn't change that.
Re:ARM: “RISC-V Architecture: Understand the Facts” by cptskippy on Monday July 09, 2018 @11:35AM (#17490995)
So what does it solve that's a problem today?

* Serious question. Apart from the freedom and control aspects of the Open Source model, what is solved with an open source CPU architecture or what are the benefits?

I can see being able to spin your own chips would enable an OEM/ODM to keep producing the same old design indefinitely where as reliance on Intel/AMD/Samsung/Mediatek means you have to refresh your design. That could be both a benefit and a detriment depending on how you look at it.

Re:ARM: “RISC-V Architecture: Understand the Facts” by snom380 on Monday July 09, 2018 @01:36PM (#17491950)
Again, being able to spin your own chips isn't really at issue here, that's already possible. ARM and MIPS will likely happily let you continue to make chips based on old cores as long as you continue to pay your license fees.

The freedoms from the Open Source model is substantial enough to make it attractive on that basis alone, just as for Linux/BSD. One example is Western Digital transitioning to RISC-V for their hard drive controllers. I would imagine being able to add your own instructions without having to deal with NDAs and non competes with ARM will be attractive to a lot of OEMs.

Just like with Linux, it's difficult to anticipate what intersting things will come out of RISC-V, but one interesting example is a formally verified RISC-V core, picorv32: https://github.com/cliffordwolf/riscv-formal/tree/master/cor... (presentation here: https://www.youtube.com/watch?v=VU97ffHF_IQ). According to the author, this core will power safety critical applications at a synchrotron: https://theamphour.com/374-an-interview-with-clifford-wolf/

Re:ARM: “RISC-V Architecture: Understand the Facts” by henrikeh on Monday July 09, 2018 @11:32AM (#17490974)
Note that RISC-V is _not_ an open-source processor, but an open-source instruction set architecture.

Which means that anyone can implement the instruction set and thus many different implementations can be made. Most likely there will not be one common and shared processor.

Re:ARM: “RISC-V Architecture: Understand the Facts” by ksec on Monday July 09, 2018 @11:53AM (#17491158)
I have been wondering, how far are we from a simple but powerful enough open source RISC-V CPU running OpenBSD in our Router or some Network Appliance.
Re:ARM: “RISC-V Architecture: Understand the Facts” by majewsky on Monday July 09, 2018 @01:55PM (#17492108)
You might want to have a look at lowRISC. https://www.lowrisc.org