Basically, I think it actually weakens the FPGA-resistance of Cryptonight.

Fortunately, the main idea of the changes would discourage ASICs being made for Monero. But it doesn't seem to discourage FPGAs, which are just one "resynthesize" away from fixing any code changes. And as long as the community becomes accustomed to regular changes, then any issues in the encryption can be fixed later.

If FPGAs can implement these changes efficiently—more efficiently than cpu miners—-and be re-synthesized to implement further changes, doesn’t that advantage them?

[1] https://spectrum.ieee.org/tech-talk/computing/hardware/lowbu...

FPGAs don't suffer this problem

Something like an FPGA + Interposer to HMC would be a huge R&D effort, and just as centralizing.

BTW: None of the designs I've talked about are strictly speaking commodity. They'd require at a minimum, custom PCBs. Maybe more advanced techniques for the best technology (again: Custom Interposer to HMC + FPGA interface + all the Verilog / VHDL code to make it happen).

As long as an FPGA-based shop kept their FPGA PCB secret, as well as their code secret, and their Device Drivers secret (You'd probably run Linux / Windows to talk to the FPGA over PCIe) then they're basically going to be ahead of the rest of the competition. Eventually, the competition would catch up, but a constant R&D effort into newer designs (ie: testing HBM2 vs HMC vs RLDRAM3 vs QDRIV, building relationships with suppliers, etc. etc.) could lead into a sustainable business edge.

Heck, early on in Monero's life, some dude got to like 40%+ of the entire network's Hash Rate by simply writing better CPU code and keeping it for himself, and then spending hundreds-of-thousands of dollars on AWS: https://da-data.blogspot.com/2014/08/minting-money-with-mone...

> By the 14th of May, we were 45% of the total hashing power on the coin. Things started to get a little exciting

FPGAs would be that on steroids. There are way fewer Verilog / FPGA engineers. It also would require custom PCBs and hardware engineers to make it all happen. I wouldn't even know who to ask to design an Hybrid Memory Cube interposer and to fit it on an FPGA for example.

https://www.xilinx.com/products/boards-and-kits/dk-u1-vcu110...

Not cheap, and probably not available in bulk, but cheaper than custom PCB R&D.

16.5 MB of internal RAM. 18MB of QDR-IV SRAM. 125MB of RLDRAM 3. 2GB of HMC.

That's plenty of RAM to pretty much crush Ethash, Cryptonight and more.

Heh, free money incoming if you've got a crypto background. Cryptocurrency is a nested fractal of incompetence.

It works just fine if you substitute "Software development" for the 1st word.