Re:Mill CPU Inter-Process Communication
by jacquesm on Monday October 09, 2017 @05:53AM
(#15432566)
Depends on the size of the chip you are trying to model, once your chip exceeds a certain level of complexity FPGA modeling can get expensive really quickly.
http://chipdesignmag.com/images/idesign/fpga/figure1.jpg
And such don't come cheap.