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A comment on The Mill CPU Architecture: Switches [video]. Parent comment

Re:The Mill CPU Architecture: Switches [video] by randyrand on Thursday July 20, 2017 @02:19PM (#14815025)
Wouldn't the individual latencies also depend on clock speed?

How would you have a CPU be able to clock-up and clock-down and still maintain good performance?

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Re:The Mill CPU Architecture: Switches [video] by hvidgaard on Friday July 21, 2017 @02:03AM (#14818392)
I'm unsure. When you increse RAM speed the timings are relaxed, and I would think that cache is the same.
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