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Re:Fearless concurrency in your microcontroller by pdelbarba on Tuesday May 09, 2017 @12:34PM (#14301463)
I really hope rust gains a foothold in the embedded market. We need these features badly. As uCs get more powerful (you can get 200mhz chips for a few dollars) with more RAM and complicated networked peripherals, it's a no-brainer to have these features available in a safe way. Currently if you have an application relying on dynamic memory usage, for instance, most developers will write their own simple memory management, usually in which you have an array that various things hold pointers to and get's freed all at once. All that just to spread some memory around, and concurrency is an even dirtier word than the heap...
Re:Fearless concurrency in your microcontroller by pjmlp on Tuesday May 09, 2017 @01:38PM (#14302176)
Many of those features are already available in Ada, and to a lesser extent Pascal and Basic.

But yeah, more options is even better.

Re:Fearless concurrency in your microcontroller by dbcurtis on Tuesday May 09, 2017 @02:14PM (#14302527)
On an ARM Cortex M4?
Re:Fearless concurrency in your microcontroller by pjmlp on Tuesday May 09, 2017 @02:52PM (#14302846)
Re:Fearless concurrency in your microcontroller by pdelbarba on Tuesday May 09, 2017 @04:27PM (#14303524)
No offense, but nobody in their right mind is going to use any of this in a production environment.

For instance, what will your hypersonic rocket do while garbage collection is running instead of it's real-time control loops?

Re:Fearless concurrency in your microcontroller by pjmlp on Tuesday May 09, 2017 @06:10PM (#14304250)
I guess the French and US military using Aonix real time JVMs for weapons control and monitoring are the right set of persons to answer your question.

Also some military think memory leaks are irrelevant on missiles, given the ultimate garbage collector.

Re:Fearless concurrency in your microcontroller by touisteur on Wednesday May 10, 2017 @03:01PM (#14310696)
Well it all depends how 'hard' your real-time is. If you go with Atego/aonix, you can get down to almost-C-Ada-like latencies but be ready to change your java coding style. Sliced-time GC works OK until you put too much pressure on it (concatenating logging strings that you're not going to record or display... allocating tons of small objets for local uses... Programming in 'Classic' java...) and it can't clean up fast enough... In the end you code in a small and sad watered down subset of java... I mean : java is everything (almost, except for primitive types) on the heap ! Avoid java collections (use javolution or hppc-rt instead), avoid auto-boxing, no local allocation, no String concatenation, no Selector API ('select' in java nio...) because it allocates like mad... God help you if you need to stream some amount of data via TCP. And be prepared to spend some time to fine tune the GC. You also take a hit on performance and compilation time compared to hotspot (you need aot compilation for real-time, the java runtime seems not as optimised... Not as many man-decades of work on it).

All in all I'd rank it 'easier' than C in developer comfort and proficiency but frankly, if you don't do C, I'd just go directly to Ada...

Re:Fearless concurrency in your microcontroller by pjmlp on Thursday May 11, 2017 @12:54AM (#14313911)
Thanks for telling your Aonix experience.

I would just argue that un these domains 'Classical C' isn't used, given the constraints regarding language features, using stuff like MISRA-C and similar.

Fully agree with Ada comment, even better if using SPARK.

In any case, many military seem more focused on being easy to hire recruits that already know how to program than training them, hence the ramping up of Java adoption.

Re:Fearless concurrency in your microcontroller by touisteur on Thursday May 11, 2017 @01:53AM (#14314091)
Well the argument seems to be that it's easier to hire 'experienced' java developers (hear: have 'java' on their resume...). But the people you get are for the most part either inexperienced (fresh out of school) or you have to break all their classic-java muscle memory. Not sure about the tradeoff here, when you compare training in Ada/SPARK.

You're right about Misra C. Even with Ada you'll end up banning dynamic memory allocation and some stack-exploding stuff, but you still have alternatives like storage pools ('looks-like-dynamic' memory allocation) and Controlled types, and at least you get a stack for structured data types and not just for primitive types...

Re:Fearless concurrency in your microcontroller by bigiain on Tuesday May 09, 2017 @08:15PM (#14304956)
Heh - saw that on Twitter last week: https://twitter.com/pomeranian99/status/858856994438094848

"Memory leaks on missiles don't matter, so long as the missile explodes before too much leaks."

Re:Fearless concurrency in your microcontroller by nickpsecurity on Wednesday May 10, 2017 @12:07AM (#14305853)
It's called real-time, garbage collection. It occurs predictably on regular intervals before enough leaks happen to blow missiles up or whatever other tragedy. Aonix and some other vendors have had it for a long time now. Meanwhile, mainstream found out in the past, few years that Go could achieve "low-latency" garbage collection. The field can do more than many of them think given the countless person-years invested in so much GC research and product development. I can't even track all of the GC's especially once they started using genetic algorithms and such to automatically make them.

EDIT to add: It says "Ada" and "Rational." That's an Ada forum. That language has little protection for temporal safety in the 1990's. More than many but not at Rust level or full leak prevention.

Re:Fearless concurrency in your microcontroller by touisteur on Wednesday May 10, 2017 @01:04PM (#14309751)
Seems AdaCore is working to add some form of borrow-checker to Spark :-) https://cps-vo.org/node/34575
Re:Fearless concurrency in your microcontroller by nickpsecurity on Monday May 15, 2017 @07:12PM (#14346032)
In case you're interested, here was a reply from Yannick at AdaCore:

https://groups.google.com/d/msg/comp.lang.ada/H35QcYiWR1Y/jJ...

It seems they're adding a little bit of it for SPARK but not critical, dynamic part. I asked him at the end if they plan to go full, dynamic safety for full Ada if the SPARK experiment succeeds. Awaiting the reply.

Re:Fearless concurrency in your microcontroller by touisteur on Wednesday May 17, 2017 @07:13PM (#14363605)
Hey thanks for the pointer to this thread. Allowing pointers in SPARK would be incredible... Today SPARK is so interesting because it's not all-or-nothing. So some parts can be SPARK (with different levels of proof), others Ada, etc.

One of the main limitations of the tech is 'no pointers' in SPARK mode. There are some tricks to hide pointers (you may want to look up the SPARK deployment guide : http://www.adacore.com/knowledge/technical-papers/implementa... ) but it would allow so much more code to be SPARK-compatible. Even in the embedded space sometimes you need pointers and linked-lists and hashmaps (and the new formal containers don't do it for you)... Frama-C allows (and seems to work with) pointers, I don't know how Well.

For Ada you can already go a long way (memory safety and data races) with protected object (nice semantics, check performance), not null pointers, controlled-types... But we're far from Rust's borrow-checker and move semantics. The name Unchecked_Deallocation (to instantiate 'Free') says it all.

Can't wait to see some progress on this !

Re:Fearless concurrency in your microcontroller by nickpsecurity on Wednesday May 10, 2017 @05:17PM (#14311816)
I don't see anything about safety for dynamic, memory management in that link. It just talks about correctness. I'm specifically wanting affine types and ownership system that let SPARK go from static to dynamic.

I do like them splitting it into several levels, though. That worked under Orange Book for security.

Re:Fearless concurrency in your microcontroller by touisteur on Thursday May 11, 2017 @01:34AM (#14314043)
My bad, slides are not available yet... There's a mention in there about some rust-like ownership proof mechanism in their roadmap. I thought about our last exchange on SPARK & rust when I saw this :-).
Re:Fearless concurrency in your microcontroller by pjmlp on Thursday May 11, 2017 @01:00AM (#14313930)
AdaCore hired the guy that designed ParaSail, however the language development is a bit slow.

https://forge.open-do.org/plugins/moinmoin/parasail/FrontPag...

Re:Fearless concurrency in your microcontroller by nickpsecurity on Monday May 15, 2017 @07:13PM (#14346036)
In case you're interested in details on this development:

https://news.ycombinator.com/item?id=14346032

Re:Fearless concurrency in your microcontroller by analognoise on Tuesday May 09, 2017 @04:37PM (#14303603)
Hypersonic rockets are probably already running Ada.
Re:Fearless concurrency in your microcontroller by pdelbarba on Tuesday May 09, 2017 @05:00PM (#14303770)
Good point :) I probably should have stuck to picking on Java. Ada is a pretty good example of a language that handles real time use cases with concurrency and memory pools well. That said, it's fallen out of favor in "recent" years.
Re:Fearless concurrency in your microcontroller by pjmlp on Tuesday May 09, 2017 @06:04PM (#14304200)
How many examples from military systems using real time Java do you want me to provide?

I can also provide examples for energy motoring, copiers, factory control systems and phone infrastructures.

Re:Fearless concurrency in your microcontroller by derefr on Tuesday May 09, 2017 @07:54PM (#14304866)
I've never heard of "real time Java" before—is it soft real-time, like Erlang; or hard real-time, like QNX? What are the concurrency primitives? (Threads? Actors?)
Re:Fearless concurrency in your microcontroller by nickpsecurity on Wednesday May 10, 2017 @12:04AM (#14305843)
Follow this link...

https://www.google.com/#q=real-time+java

...to get a Wikipedia summary, standards body, a tutorial, and probably some products. It's more useful than Google usually is on some terms like this that might muddy up search results.

Re:Fearless concurrency in your microcontroller by analognoise on Tuesday May 09, 2017 @09:40PM (#14305319)
One mission critical system, where failure is not an option, such as on a hypersonic rocket.

One actual combat system - not a terminal for use on base, but something you have to rely on when people are shooting at you.

One.

Re:Fearless concurrency in your microcontroller by pjmlp on Wednesday May 10, 2017 @02:09AM (#14306224)
Thanks for making my life easy.

USS Bunker Hill ballistic missile defense system weapons control.

http://www.militaryaerospace.com/articles/2010/04/aonix-perc...

"The Aegis Weapon System is the premier naval defense system and the sea-based element of the U.S. Ballistic Missile Defense System. Its precision SPY-1 radar and integrated command and control system guides the interceptor and uplinks target track information to the missile for terminal homing. Its ability to detect, track, and engage targets ranging from sea-skimming cruise missiles to ballistic missiles in space is proven."

Good enough for mission critical system, hypersonic rockets, combat system firing at me?

If not, I can provide other ones, better suited to your use cases.

Re:Fearless concurrency in your microcontroller by nickpsecurity on Wednesday May 10, 2017 @12:24AM (#14305910)
Those go through certification processes. It's been against the rules to use a GC even if it's hard-real-time. Here's an example where the author points out the real-time Java was designed for DO-178B (safety-critical aerospace) but it wasn't until DO-178C that they even considered allowing a GC:

http://www.aicas.com/papers/EmbeddedWorld2009-Andy-Walter.pd...

The companies that develop reusable solutions for multiple markets tend to pick something easy to certify or sell to all of them. So, if Java wasn't allowed, they'd lean toward something else in their products targeting highest-assurance just to reduce costs. That's mostly been assembly, C and Ada that I've seen.

Meanwhile, we do have proof it can be done in things such as the Sandia Secure Processor that they'll use for some of highest-assurance applications. The first-pass silicon they got was also nice. The best articles by Wickstrom et al on SSP are paywalled in ACM and IEEE if you have access. If not, there's a link below on how they built it with brief description of it under "Score processor," another name.

http://www.sandia.gov/LabNews/LN01-11-02/key01-11-02_stories...

https://www.researchgate.net/publication/236425094_Sandia_se...

ftp://ftp.cs.kent.ac.uk/people/staff/phw/.old-1999/tmp2/443-cpa2007-wickstrom.pdf

Re:Fearless concurrency in your microcontroller by nickpsecurity on Wednesday May 10, 2017 @12:03AM (#14305838)
There's a lot of them:

https://en.wikipedia.org/wiki/Embedded_Java

A particular vendor (formerly Aonix) that always had interesting innovations in runtimes, tradeoffs, FFI's, and so on:

http://www.businesswire.com/news/home/20050307005203/en/Aoni...

https://www.ptc.com/developer-tools/perc

Each of them is a company making serious money in embedded systems. A few do safety-critical. I'll let you wonder whether they were in their right mind for building Java apps and using Java runtimes that don't seem to fail in high-stakes circumstances.

Re:Fearless concurrency in your microcontroller by amelius on Tuesday May 09, 2017 @12:38PM (#14301502)
Otoh controllers cost almost nothing, so you can get safe concurrency just by duplicating the CPU.
Re:Fearless concurrency in your microcontroller by pdelbarba on Tuesday May 09, 2017 @12:45PM (#14301583)
You're not wrong, but this is sort of like saying that CPU's cost nothing, so just replace your i5 with 4 celerons. Distributed programming is even harder than multi-threaded programming if you need tightly coupled communication. Imagine you need to read an ADC (think oscilloscope output if you're not familiar) at 1MB/s and also need to be analyzing the data while talking to other devices on various peripherals about what you've found. You'll have to use Direct Memory Access most likely so communicating that data stream over SPI to another microcontroller might not be the best idea unless you have a lot of extra RAM to buffer everything in.

Edit: and the real reason you don't want to do this is because the EEs and manufacturing engineers on your project will try to kill you. Two uCs means two codebases and two devices to program during production, plus extra testing, more complicated design, and more parts to place (uC, crystal, caps, etc)

Re:Fearless concurrency in your microcontroller by VLM on Tuesday May 09, 2017 @04:31PM (#14303551)
All problems disappear with enough speed. Eventually the main loop is fast enough that you can poll.

If you're doing something truly cutting edge your competitors aren't better than you are so you can afford that second uC and more parts.

Most of engineering judgment is finding the point where the goal is ambitious enough to keep up with or pass the competition while conservative enough that it'll likely work, or at least you won't get sued.

Re:Fearless concurrency in your microcontroller by pdelbarba on Tuesday May 09, 2017 @04:39PM (#14303615)
In abstract this is true, but in real life, you get presented with a microcontroller and are told to make X happen in Y time. The current trend is where microcontrollers are becoming fast enough to essentially be bare-bones computers. Maybe they're so fast that you can poll a dozen sensors fast enough to respond to an event, but now clients want you need to drive a graphic display with all the system performance stats in real time and stream cat videos via UDP to it whenever the user gets bored.

Being able to squeeze the full potential out of these devices is getting harder and harder with current methods. Safe concurrency and memory management can allow developers to fully utilize their hardware without needing a grey beard to write some unreadable assembly that you later find out was just a plagiarized version of the Windows ME memory manager.

Re:Fearless concurrency in your microcontroller by kevin_thibedeau on Tuesday May 09, 2017 @07:58PM (#14304890)
You can't just thrown in more, beefier hardware with hard power and volume constraints.
Re:Fearless concurrency in your microcontroller by dbcurtis on Tuesday May 09, 2017 @02:21PM (#14302589)
Never trust a sentence with the word "just" in it.

Duplicating the microcontroller on a project where people spend all afternoon arguing about 10 cents on the BOM is not a welcome idea. Also, the most eye-opening required course I took as an undergrad was reliability engineering. After you learn to do the reliability math, adding several solder joints to the product purely out of laziness looks profoundly stupid. Neither idea makes you look good to the old grey-beards on the other side of the table at the design review.

Re:Fearless concurrency in your microcontroller by LeifCarrotson on Tuesday May 09, 2017 @04:33PM (#14303570)
> Never trust a sentence with the word "just" in it.

Or the word 'never'. There are no absolutes! :)

Re:Fearless concurrency in your microcontroller by jandrese on Tuesday May 09, 2017 @06:53PM (#14304536)
On the other hand building a system out of a lot of small processors tends to lead to very complex systems in the end, since the different parts almost always need to communicate at some point. In the end it doesn't buy you much since you end up having to write message passing systems and their associated handlers everywhere.