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A comment on How Many X86-64 Instructions Are There Anyway?. Parent comment

Re:How Many X86-64 Instructions Are There Anyway? by dom0 on Sunday April 30, 2017 @05:34PM (#14233975)
It's almost always better to have a dedicated chip implement some algorithm, if it makes economic sense to do so. From hard drive controllers to Google's TPU.
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Re:How Many X86-64 Instructions Are There Anyway? by deepnotderp on Sunday April 30, 2017 @07:07PM (#14234381)
Deep learning processor != an ASIC

If you burned an ASIC for a single type of network architecture, then that would be something else.

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Re:How Many X86-64 Instructions Are There Anyway? by CalChris on Sunday April 30, 2017 @11:34PM (#14235427)
The TPU is an ASIC.

The result is called a Tensor Processing Unit (TPU), a custom ASIC we built specifically for machine learning.

https://cloudplatform.googleblog.com/2016/05/Google-supercha...

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Re:How Many X86-64 Instructions Are There Anyway? by deepnotderp on Monday May 01, 2017 @09:51AM (#14237430)
Perhaps it's a confusion of terminology, because most people I know would call it as asip. It has the flexibility to implement any linear operation after all.
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