There is work underway to create an LLVM backend for the Tensilica Xtensa, so Rust on the ESP32 / ESP8266 might soon be a reality!

Not the ESP8266 of course, but in the same vein you may be interested in effots to get Rust working on the RTL8710: https://polyfractal.com/post/rustl8710/

Do you know of any place one can track this work? Best reference google brought me was https://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk/gcc/con... - but pretty hard to decipher current state from that...

Got that directly from an Espressif employee as inofficial info, but it has since been confirmed: https://twitter.com/buddy_casino/status/824299718104743938

So I guess its not in the open right now.

I wonder if its going to be specific to their chips, because the Xtensa architecture is highly configurable and so there isn't really a single target, but potentially many.

Probably not "soon", AVR took a really long time to get merged into LLVM, and that's a pre-requisite for Rust support.

I can't comment on timelines but I know someone has been working on AVR support for Rust.

Oh yeah the micro folks are definitely working on it, I meant that if work is just starting on the LLVM Xtensa backend, the Rust merge is nowhere near, and as example submitted that the AVR backend had taken a long time to be merged into LLVM and still needs to be finished & merged for Rust.

There is nothing that I could do with them, but I love their specs, specially when I think about my first MS-DOS computer.

So I imagine there would be lots of nice maker opportunities when that support comes out, not only for Rust, but for other LLVM frontends as well.

Totally, I like to think of them as this generations C64, though some might argue that the Arduino Uno or the Raspberry Pi deserve that title.

For example, the MSP430 was used in Square's early credit card readers to encrypt the mag stripe data.

Fun fact - the MSP430 ISA is based on the PDP-11 ISA.

Do you have a source I could read? This is super interesting.

Best independent source I can find is http://www.cpushack.com/CPU/cpu4.html#Sec4Part14.

I noticed whilst writing a verilog implementation - seeing the @PC+ relative modes for immediate data made me dig out my PDP-11 reference card.

The number of addressing modes has been halved, gaining a bit for register encoding, and the status register is now in the register file (R2), and R3 is used to generate various constants depending on mode.

Compare and contrast:

* https://en.wikipedia.org/wiki/PDP-11_architecture#CPU_regist... * https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU

Awesome, thanks.

So was the Motorola 6800. I think it would be more surprising if they did everything from scratch rather than modelling it on some pre-existing work...

https://en.wikipedia.org/wiki/Motorola_6800

Yeah, in light of how hard AVR is to get over to LLVM it's really encouraging to see MSP430 support.

MSP430 has been in LLVM for a very, very long time though, since 2010 or so.

Is there a good solution for getting the code onto a chip? Last time I tried with the open source GCC stack, I eventually gave up and installed the painfully large (~1GB) IDE from TI.

I don't know if I would call it "good" but if you're willing to settle for "official" there is http://www.ti.com/tool/MSP430-FLASHER which will work with TI's own MSP-FET on all three major OSs.

Accepts a .hex so you can use whatever toolchain you want.

> I eventually gave up and installed the painfully large (~1GB) IDE from TI.

Is it still C++98 only?