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A comment on Epiphany-V: A 1024-core 64-bit RISC processor. Parent comment

Re:Epiphany-V: A 1024-core 64-bit RISC processor by neurotech1 on Wednesday October 05, 2016 @04:15PM (#12647408)
What type and size memory can the Epiphany-V support?

Also congrats! This is brilliant engineering to get a chip like this into production silicon as a small team.

How much did the prototype MPW(?) silicon cost?

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Re:Epiphany-V: A 1024-core 64-bit RISC processor by adapteva on Thursday October 06, 2016 @10:48AM (#12652884)
Up to 1 petabyte supported theoretically through FPGA interfaces.

We can't disclose MPW costs. Chip was funded by DARPA. For standard MPW costs, check with MOSIS.

https://www.mosis.com/

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