Create Your Own CPU on an FPGA

Re:Create Your Own CPU on an FPGA by sklogic on Thursday August 20, 2015 @12:51PM (#10093049)

There is a trade-off between performance and area. Pipelined designs are bigger (not least because of all that pipeline registers).

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Re:Create Your Own CPU on an FPGA by berossm on Thursday August 20, 2015 @01:05PM (#10093163)

Very good point. This is even more critical in a FPGA as you are working with a fairly constrained resource.

There were a number of people in my first hardware design course that had a great idea right up until they found it didn't fit on the xilinks chips we had in the lab.

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Re:Create Your Own CPU on an FPGA by alain94040 on Thursday August 20, 2015 @09:36PM (#10095531)

From the proposed flat design, adding pipelining would probably add 10-20% more area, and double or triple the speed. Definitely worth exploring (and would indeed make for a great follow-up post).

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Re:Create Your Own CPU on an FPGA by sklogic on Friday August 21, 2015 @04:17AM (#10096455)

Only if it's a 3-stage pipeline without a hazard detection. Otherwise the area would at least double. But, yes, I'd also like to see a pipelined core in this new HDL.

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