berossm

Very good point. This is even more critical in a FPGA as you are working with a fairly constrained resource.

There were a number of people in my first hardware design course that had a great idea right up until they found it didn't fit on the xilinks chips we had in the lab.

It is likely that some of the functions are trap door functions. That is basically what is the theory behind the random number generator that the NSA paid to have set as default in BSAFE library. https://en.wikipedia.org/wiki/Dual_EC_DRBG