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tavianator

Re:Google copybara: moving code between repositories on Thursday July 02, 2026 @06:28PM (#48768188)
Didn't Google have a tool for this called MOE (Make Open Easy) like 15 years ago? I remember it from some of my open source contributions to Guice
Re:ARC-AGI-3 on Wednesday March 25, 2026 @10:21PM (#47525973)
> Airplanes don't have wings

???

Presumably that's just a mistake. The author calls it "stochastic gradient descent" correctly elsewhere in the article
Re:lsr: ls with io_uring on Friday July 18, 2025 @12:57PM (#44607073)
I did try it a while ago and it wasn't profitable, but that was before I added stat() support. Batching those is probably good
Re:lsr: ls with io_uring on Friday July 18, 2025 @12:27PM (#44606605)
My bfs project also uses io_uring: https://github.com/tavianator/bfs/blob/main/src/ioq.c

I'm curious how lsr compares to bfs -ls for example. bfs only uses io_uring when multiple threads are enabled, but maybe it's worth using it even for bfs -j1

Re:Pathfinding on Thursday May 15, 2025 @02:52PM (#43998102)
You may want to look into improvements to A* for grids, like Rectangular Symmetry Reduction.
They were referencing the title of a specific paper, which invented type classes: https://dl.acm.org/doi/10.1145/75277.75283
Re:Driving Compilers (2023) on Monday May 05, 2025 @08:07AM (#43894180)
The C standard (since C99) says that `main()` has an implicit `return 0`, you don't need to write it explicitly.
Re:Parallel ./configure on Saturday April 26, 2025 @02:56PM (#43806191)
I was looking for a relevant paper and found this one, which isn't what I was looking for but is related: https://sigops.org/s/conferences/hotos/2023/papers/liargkova...
Re:Parallel ./configure on Saturday April 26, 2025 @01:07PM (#43805305)
My actual "production" implementation of this concept does support that: https://github.com/tavianator/bfs/blob/main/configure

But I wanted the blog post sized version to be simpler for exposition.

Re:Parallel ./configure on Saturday April 26, 2025 @12:00PM (#43804752)
Just tried reconfiguring LLVM:

    27.24s user 8.71s system 99% cpu 36.218 total
Admittedly the LLVM build time dwarfs the configuration time, but still. If you're only building a smaller component then the config time dominates:

    ninja libc  268.82s user 26.16s system 3246% cpu 9.086 total
Re:Parallel ./configure on Saturday April 26, 2025 @12:56AM (#43801057)
Nice! I used to do something similar, don't remember exactly why I had to switch but the two step process did become necessary at some point.

Just from a quick peek at that repo, nowadays you can write

#if __has_attribute(cold)

and avoid the configure test entirely. Probably wasn't a thing 10 years ago though :)

Re:Parallel ./configure on Saturday April 26, 2025 @12:35AM (#43800978)
Whoops! Forgot to do that when I switched from a ``` block to raw html
Re:fd: A simple, fast and user-friendly alternative to 'find' on Wednesday March 19, 2025 @02:56PM (#43415978)
You might be interested in rawhide[1] or fselect[2]. (Note: I don't really use them myself, but they seem to offer something like what you're suggesting.)

Also, this is still a find-style syntax, but my bfs utility supports -exclude [3]. So you can write

    bfs -type f -exclude -path ./excluded_dir
which is a bit more ergonomic.

[1]: https://github.com/raforg/rawhide

[2]: https://github.com/jhspetersson/fselect

[3]: https://github.com/tavianator/bfs/blob/main/docs/USAGE.md#-e...

Re:fd: A simple, fast and user-friendly alternative to 'find' on Wednesday March 19, 2025 @11:38AM (#43413447)
At least with GNU coreutils, you can use `-r`/`--relative`
Re:fd: A simple, fast and user-friendly alternative to 'find' on Wednesday March 19, 2025 @11:36AM (#43413427)
Someday I will get that functionality into fd :)
Re:Writing a simple pool allocator in C on Thursday January 09, 2025 @09:28AM (#42645910)
I've replaced Valgrind with sanitizers for most of my workflow. Using the sanitizer APIs in your custom allocator is also easy: https://github.com/tavianator/bfs/blob/main/src/sanity.h https://github.com/tavianator/bfs/blob/31dffd6441ba80ea998ce...
Re:The Alder Lake Anomaly on Saturday January 04, 2025 @06:35PM (#42598476)
Very interesting, thanks! If I get time I'll try to measure every instruction to see the whole set of affected instructions.
Re:The Alder Lake SHLX Anomaly on Saturday January 04, 2025 @02:10PM (#42596899)
Wrote up the presumed explanation here: https://tavianator.com/2025/shlxplained.html
Re:The Alder Lake SHLX Anomaly on Friday January 03, 2025 @04:03PM (#42589440)
In general I'd be very surprised if code alignment had much effect on a 10,000 instruction block, especially since the instruction is 5 bytes long so it will quickly unalign itself
Re:The Alder Lake SHLX Anomaly on Friday January 03, 2025 @12:51PM (#42587837)
> Wait a sec, isn’t this backwards?

No, if you push and pop RCX it's fast again. I mentioned this in the blog post, `mov rcx, 1` is slow but `mov rcx, 1; push rcx; pop rcx` is fast.

Re:The Alder Lake SHLX Anomaly on Friday January 03, 2025 @12:20PM (#42587510)
Right. Actually it turns out it's 11 bits, since [-1024, 1023] are all supported by the immediate add renamer.

In general I think people are overstating the delay of an additional 64-bit add on register file reads (though I'm not a hardware guy so maybe someone can correct me). There are carry-lookahead adders with log_2(n) == 6 gate delays. Carry-save adders might also be relevant to how they can do multiple dependent adds with 0c latency.

> And, presumably, the OP shift case here is in fact a case of there not being a built-in immediate adder and thus a need for fixup uops being inserted to materialize it?

No, the perf counters show 1 uop dispatched/retired in both the slow and fast cases.

Re:The Alder Lake SHLX Anomaly on Friday January 03, 2025 @08:50AM (#42585619)
Benchmark code is in the post! The trick is to limit the number of SHLX instructions before you re-initialize RCX. Doing it every 10,000 keeps it fresh enough. I didn't have to disable preemption or anything, perf shows 0 context switches and only ~50 page faults (probably all at startup).
Re:The Alder Lake SHLX Anomaly on Friday January 03, 2025 @12:01AM (#42582623)
I did try aligning the loop, it didn't matter
Re:The Alder Lake SHLX Anomaly on Thursday January 02, 2025 @11:59PM (#42582599)
SAL and SHL are synonyms, they have the same encoding. SHL only accepts CL as the count register, there's no other form that takes a variable shift count
Re:The Alder Lake SHLX Anomaly on Thursday January 02, 2025 @10:36PM (#42582098)
SHL suffers from the same latency issue as SHLX it turns out

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