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A comment on Show HN: A pipelined RISC-V processor written in VHDL. Parent comment

Re:Show HN: A pipelined RISC-V processor written in VHDL by inforichland on Tuesday July 28, 2015 @09:01PM (#9965667)
Thank you :) Also thanks for the information; I had been wondering if someone had made some more thorough automated tests, I will definitely check those out!
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