Re:CλaSH – From Haskell to Hardware
by adwn on Sunday May 10, 2015 @02:32AM
(#9519086)
I don't have experience with Esterel in particular, but I can make some statements about imperative synchronous languages in general:
- They're a step in the right direction (e.g., implicit state machines), but then they're doing too much of a good thing. For example, in my experience, "abort" and especially "suspend" statements are not that important in non-toy examples, but they make the compiler more complex.
- Integrating external IP cores is difficult, but is absolutely essential for any real-world design.
- Even small FPGA designs contain usually at least two clock domains. This situation is typically impossible to design in imperative synchronous languages.
- They're a step in the right direction (e.g., implicit state machines), but then they're doing too much of a good thing. For example, in my experience, "abort" and especially "suspend" statements are not that important in non-toy examples, but they make the compiler more complex.
- Integrating external IP cores is difficult, but is absolutely essential for any real-world design.
- Even small FPGA designs contain usually at least two clock domains. This situation is typically impossible to design in imperative synchronous languages.