Yes it is still in use, and the simulation capabilities are quite advanced! It remains a HDL, better than VHDL and Verilog, so you still have to worry about resetting, clocks and state machine.

Just a word of caution the cycle accurate simulator is still a bit experimental (don't use big numbers, and bit accurate signed arithmetic is not finished yet... we're working on it)

If you are interested in using python for unit testing there is also Cocotb which is a python based library for running verilog and vhdl simulations. It interfaces to the simulator and allows you to stimulate your design directly from python:

https://github.com/potentialventures/cocotb

Very interesting. Will definitely look into this.

All of our tests right now are implemented as VHDL/Verilog testbenches. We automate building and running in ISim with a simple Python tool which generates xunit output. It works but its slow and kind of painful to manage testcases.