Re:The Cx programming language: digital hardware design for ...
by daphreak on Tuesday January 20, 2015 @03:03PM
(#8919141)
Very interesting. Will definitely look into this.
All of our tests right now are implemented as VHDL/Verilog testbenches. We automate building and running in ISim with a simple Python tool which generates xunit output. It works but its slow and kind of painful to manage testcases.
All of our tests right now are implemented as VHDL/Verilog testbenches. We automate building and running in ISim with a simple Python tool which generates xunit output. It works but its slow and kind of painful to manage testcases.