I believe the transistor-level simulation came from these images:

http://www.visual6502.org/images/pages/Atari_10444D_TIA.html

There are gate-level schematics for the TIA too:

https://atariage.com/2600/archives/schematics_tia/index.html

I didn’t know the chematics for the TIA, thank you very much!

I find this Chip quite intriguing because it's so minimal; its stunning how much could be archieved even under the hardest restrictions. Or how little, compared to later graphic chips of the 8-bit era (like the PPU of the NES).

Better than drinking lead and breathing silane; not Verilog but JSSim based? I mean, is this something I should throw a solver at for a Buff My Game Vortal compo? Maybe there's a microelectronic comedy of errors written in D or Rust to be had in it, as multiwatt instructions are used in moderation and ROM interface glitches snowball just as a 4-byte cache comes into use? A lifecycle tool for the haughtier ARM64 74-core program teams making 28-year constant hardware projections?

Someone's testing their Markov Generator on HN again.

Or trying to be funny, but trying way too hard.

Judging by saeguaiga's other comments, you appear to be correct.