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A comment on Open Source GPGPU. Parent comment
FPGA's for ASIC simulation of larger chips are typically arrays of FPGAs rather than single chips.
You get stuff like this:
http://chipdesignmag.com/images/idesign/fpga/figure1.jpg
I'm not aware of anybody shipping a wafer scale FPGA.
Now I get it. Sorry for the misunderstanding, appreciate the expansion.
FPGA's for ASIC simulation of larger chips are typically arrays of FPGAs rather than single chips.
You get stuff like this:
http://chipdesignmag.com/images/idesign/fpga/figure1.jpg
I'm not aware of anybody shipping a wafer scale FPGA.