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Re:Intel i7 loop performance anomaly by eliben on Tuesday December 03, 2013 @11:07PM (#6844986)
I was studying this difference between the two compilers for a different issue, actually. According to the standard, I don't see anything that prevents an increment of a volatile to be performed in a single instruction if the target permits it. Splitting it to a separate load+binop+store by gcc seems like an over-pessimization.

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