AMD's Zen 6 Family: Feeding the Beast

Re:AMD's Zen 6 Family: Feeding the Beast by Tuna-Fish on Tuesday November 10, 2026 @03:32PM (#50445905)

Stockfish parallelizes well and makes heavy use of vector operations, and the Zen5 core has AVX-512 with 2x 512bit EU per core and 16 cores, while the Apple still only uses 128-bit wide SIMD, with the 6 M5 "Super" cores having 4x128 EUs and the 12 "Performance" cores only having 2x128 EUs.

The M5 Pro is doing shockingly well given the massive disparity in execution resources. But still, it's optimized for web/desktop-like loads, you shouldn't really run heavy number crunching on that CPU.

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Re:AMD's Zen 6 Family: Feeding the Beast by wredcoll on Tuesday November 10, 2026 @04:56PM (#50446857)

Is there any sane way to generalize these results?

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Re:AMD's Zen 6 Family: Feeding the Beast by Narishma on Tuesday November 10, 2026 @06:16PM (#50447676)

I don't think so. The workloads are simply too different to generalize.

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Re:AMD's Zen 6 Family: Feeding the Beast by hajile on Tuesday November 10, 2026 @10:27PM (#50449445)

They also mention using SSE/AVX on x86 and NEON on ARM, but there's zero mention of SVE, SME, or AMX which makes me wonder if they aren't compiling with those options (if so, it would be a serious disadvantage).

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Re:AMD's Zen 6 Family: Feeding the Beast by Tuna-Fish on Tuesday November 10, 2026 @11:02PM (#50449619)

Apple cores do not implement SVE, SME is not suitable for Stockfish (it is optimized for matrix-matric with large batch size, stockfish is all matrix-vector with batch size of 1), and AMX has the same problem.

You don't get good performance out of this kind of code by just compiling with different options, the compute kernels must be tuned to fit the architecture, and nothing on the M-series but NEON fits the bill.

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