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Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by monocasa on Tuesday June 23, 2026 @02:39PM (#48649423)
Except hot spots quickly reach the melting point of silicon these days. That creates, let's say, a rather steep drop off in performance.
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by slashdev on Tuesday June 23, 2026 @03:51PM (#48650387)
Pure silicon melts at 1400 C

You must be thinking of something else

Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by kridsdale1 on Tuesday June 23, 2026 @04:18PM (#48650748)
In NAND, data loss is proportional to temperature. I don’t recall how logic circuit errors behave.
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by boznz on Tuesday June 23, 2026 @06:09PM (#48652164)
I take your point, but an IC is not pure silicon
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by jamesik on Wednesday June 24, 2026 @03:03AM (#48656232)
Indeed. For instance, dopants can diffuse and metals can intermix with silicon (silicide formation), both degrade device performance. Solder and packages melt before any of this happens.
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by adrian_b on Wednesday June 24, 2026 @04:25AM (#48656827)
It is easy to melt the semiconductor in a semiconductor device long before the solder or package materials are melted.

Above a certain temperature threshold, the electrical resistance of semiconductors drops exponentially with temperature, which is why NTC (negative thermal coefficient) thermistors are made of semiconductor materials.

This causes a positive feedback loop that increases the current very quickly and concentrates it through a narrow channel through the semiconductor (so the current density can be extremely high even when the total current is still low), which can easily reach 1500 Celsius degrees, melting the silicon, while the temperature of the package and of the solder remains very low (because the time is too short for the temperature to propagate outwards from the melted silicon channel).

Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by monocasa on Tuesday June 23, 2026 @06:45PM (#48652565)
Nope, thermodynamics is weird at small scales. Hot spots can absolutely reach 1400C if not designed not to. Sophie Wilson (initial architect of the ARM processor) has talked about how poorly designed silicon can reach point temperatures hotter than a nuclear reactor steady state.
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by slashdev on Tuesday June 23, 2026 @07:59PM (#48653360)
That’s crazy. I thought maybe some of the other elements used in modern semiconductors might melt first. The wiring seems like a potential problem. But before that even the elements they use in the transistors themselves could be an issue.
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by monocasa on Tuesday June 23, 2026 @08:27PM (#48653564)
The wiring has lower resistance for a bunch of different reasons, so the heat has a tendency to be concentrated on the transistors themselves (which are mostly silicon, just doped).
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by adrian_b on Wednesday June 24, 2026 @04:13AM (#48656749)
Like I have already said in another comment, semiconductors and metals behave differently when temperature increases.

For metals the electrical resistance increases with temperature, causing a negative feedback that limits the increase of the temperature, while for semiconductors the electrical resistance decreases with temperature above a certain threshold, so once that threshold is reached positive feedback increases the temperature very quickly until the semiconductor is melted, unless there is some protection system that limits the power dissipation through the semiconductor.

That is why it is very easy to melt silicon in an integrated circuit or in a discrete device, despite its high melting point.

Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by slashdev on Wednesday June 24, 2026 @02:22PM (#48663789)
Very surprising! Thanks for sharing
Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by adrian_b on Wednesday June 24, 2026 @04:02AM (#48656674)
The melting of silicon was a common phenomenon already during the second breakdown of power transistors, e.g. in audio amplifiers or in TV sets, more than a half of century ago.

In semiconductors there is a positive feedback between temperature and the current that passes through them, so once a certain threshold is passed, the current and the temperature grow very quickly until the semiconductor is melted. This is opposite to the behavior of metals, where resistance grows with temperature, tending to limit the current that passes through the metal, when it overheats.

The currents through the transistors of SOTA logic gates are very small, but their volumes are also very small, so the power density is similar to that in high power transistors.

Thus thermal breakdown that leads to silicon melting is easily achievable. This is why any modern CPU has on-die temperature sensors, so that temperature is monitored and power dissipation is limited, to ensure that the threshold that triggers positive thermal feedback is never reached.

Re:Samsung Demonstrates 3D Stacked FETs with Triple Nanoshee... by flossEveryday on Thursday June 25, 2026 @10:15AM (#48673776)
wow, i had heard of transistor thermal runaway, but i didn't know you could reach silicon melting point temperatures. though i guess in hindsight it makes sense that, considering that during the manufacturing process semiconductors are already exposed to very high temperatures, if you are instantly permanently altering a device with heat (as you do when you destroy it through thermal runaway), you must be reaching comparably high temperatures.

what type of people look at heat transfer at the device level in an IC (and at such short time scales)? where can i learn more about that? this looks like it could have an impact in analog power circuits, because even if you don't destroy the transistor you could alter its characteristics, but i haven't seen a lot of attention being paid to that. personally i guess i figured individual transistors never went significantly beyond the temperature ranges we already consider for the circuit as a whole.

thank you for sharing