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A comment on The adder at the heart of Intel's 8087 floating-point chip. Parent comment

Re:The adder at the heart of Intel's 8087 floating-point chip by mitthrowaway2 on Saturday June 13, 2026 @04:06PM (#48520898)
Do you know about how many transistors are needed to implement the adder (or the FPU as a whole)? And how it scales with the width of the numbers (16 bit, 32 bit, etc)?

I've been curious about transistor counts for floating point units for a while, but it's hard to find information about them.

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Re:The adder at the heart of Intel's 8087 floating-point chip by kens on Saturday June 13, 2026 @04:33PM (#48521161)
I count approximately 2014 transistors (including pull-ups) for the 69-bit adder. Each block of four bits takes approximately 117 transistors.
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