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A comment on RISC-V Is Sloooow. Parent comment

Re:RISC-V Is Sloooow by dzaima on Thursday March 12, 2026 @09:33AM (#47350321)
Indeed we shall hope heuristics update; but of course if no compilers emit it hardware has no reason to actually bother making fast misaligned ops, so it's primed for going wrong.
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Re:RISC-V Is Sloooow by adgjlsfhk1 on Thursday March 12, 2026 @04:31PM (#47356633)
hardware devs traditionally have been pretty good at helping the compiler teams with things like this (because its a lot cheaper to improve the compiler than your chip).
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