Re:RISC-V Is Sloooow
by classichasclass on Tuesday March 10, 2026 @08:56PM
(#47330668)
I mean "boring" in the sense that its ISA was relatively straightforward, no performance-entangling kinks like delay slots, a good set of typical non-windowed GPRs, no wild or exotic operations. And POWER/PowerPC and PA-RISC weren't a lot later than SPARC or MIPS, either.
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