RISC-V Is Sloooow

Re:RISC-V Is Sloooow by cpgxiii on Tuesday March 10, 2026 @05:34PM (#47329065)

I think the story is a bit more complicated. Core succeeded precisely because Intel had both the low-power experience with Pentium-M and the high-power experience with Netburst. The P4 architecture told them a lot about what was and wasn't viable and at what complexity. When you look at the successor generations from Core, what you see are a lot of more complex P4-like features being re-added, but with the benefits of improved microarch and fab processes. Obviously we will never know, but I don't think you would get to Haswell or Skylake in the form they were without the learning experience of the P4.

In comparison, I think Arm is actually a very strong cautionary tale that focusing on power will not get you to performance. Arm processors remained pretty poor performance until designers from other CPU families entirely (PowerPC and Intel) took it on at Apple and basically dragged Arm to the performance level they are today.

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Re:RISC-V Is Sloooow by maximilianburke on Tuesday March 10, 2026 @08:21PM (#47330449)

And not just any PowerPC architects either, but the people from PA Semi. Motorola couldn't get the speed up and IBM couldn't get the power down.

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Re:RISC-V Is Sloooow by fidotron on Wednesday March 11, 2026 @09:10AM (#47335113)

> In comparison, I think Arm is actually a very strong cautionary tale that focusing on power will not get you to performance.

Hugely underappreciated. Someone involved fully understood that "you don't get to the moon by climbing progressively taller trees".

The other two times Arm had great performance were the StrongArm, when it was implemented by DEC people off the Alpha project, and the initial ones, which were quite esoteric and unusually suited to the situation of the late 80s.

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