Correct. However you need circuitry on silicon to implement said architecture which is the expensive and time consuming part.
That's not quite what Raspberry Pi did with the RP2350 (the ARM and RV cores are wholly separate) but they did include the ability to fuse off one side or the other, so I wonder if they'll release a cheaper RV-only version at some point.
A dual ISA decoder with with fuse-off options will likely have unwelcome power-perf-area and yield consequences.
Apart from that there’s the other usual angles: The very fact that there’s additional logic in the compute path (eventually fused off) means additional design and verification complexity. The additional area, although dark, eats into the silicon yield at the fab.
Not saying it’s not possible.
Implementing ARM and RISC-V decoders might depend on licensing fine print for each licensee
They'll need to license future versions of the ARM ISA and now they know the licensor is hostile.
Buying a team that's already working on RISCV also reduces the chances of ARM lawyers getting involved.
Ventana is a company founded and build around a team to do massive ultra wide chips for data-center, and their focus was not efficiency primary. The kinds of chips they build are just not the right fit. Moving all that team over to something on the literal other end of the spectrum and dropping their existing products and costumers seems a bit silly.
Frankly, Ventana seemed like an interesting entry in the space, but I have no idea who would have actually bought their servers at the end of the day. They taped out multiple designs, but none actually seem to exist outside their labs. I don't really see any path to meaningful RISC-V server adoption for at least several more years and by that time Qualcomm could design something on their own, assuming they are serious about re-entering the market. Grabbing the talent and any useful IP/core design components makes the most sense to me, anyway.
RISC-V being freely available does not mean that implementations of it will not be patented from here to the Orion nebula and back.
Qualcomm also wants the RISC-V engineers and their Knowledge and the Software Ecosystem and SDKs/Tools that Ventana has developed over the years to create CPU cores that execute that RISC-V ISA. And that includes all the design Verification tools/EDA tools that Ventana developed for their specific CPU core designs and all that non hardware stuff that takes a larger investment in dollars than just the hardware's development alone costs!
So the RISC-V ISA is Royalty free but not anyone's actual RISV-V ISA executing CPU core designs that cost millions to create and are the proprietary part of the Acquisition that Qualcomm is after. I'd imagine that Qualcomm's Nuvia engineers could more rapidly swap out the ARM ISA Instruction Decoders on any Oyron cores with some RISC-V Decoders and use most of the same Oryon Micro-op engine design that's native to the current Oryan generation cores but maybe Ventana's micro-op execution engine has something that's valuable to Qualcomm as well.
And so ISAs on modern microprocessors are abstracted away at the actual hardware level by the Micro-ops execution engine desogns that are proprietary to the ones that created them. And the reason that many license from ARM holdings is not just the ISA but the software/OS/Drover ecosystem that's built up over the decades for the ARM ISA ecosystem and that costs many times more than the hardware's costs to develop and maintain over the years. And so the ARM OS/Software/API and driver ecosystem is decades more mature than the RISC-V OS/Software/API and driver ecosystem, and that took years and 100s of billions in investments to get ARM where it is today!
But since RISC-V is royalty free there are hundreds of companies using RISC-V, including Nvidia for it's FALCON(FAst Logic CONtrollers) that are used all over Nvidia's GPUs and other accelerators. And with RISC-V one is free to implement only a subset of the RISC-V ISA or create custom RISC-V ISA extensions unlike ARM holdings where licensees have to implement the entire ARM Licensed ISA regardless of if all the instructions are needed for the task and no ISA extensions allowed.
So maybe Qualcomm is interested in the micro-controller market that's lower margin and that makes RISC-V's Royally Free more attractive! Or Qualcomm, like Nvidia, wants to develop some RISC-V Micro-Controllers for it's own in-house needs and not have to pay for ARM Holdings ISA based Micro-Controller designs. Look at Nvidia's dozens of on GPU die Controllers(Encoder/Decoder Logic,Etc) and because that's Nvidia FALCON RISC-V based that's quite a bit of savings in Royalty Payments and CPU core design payments to ARM Holdings or anyone else because FALCON is Nvidia's In-House IP and that RISC-V ISA is free to use for Nvidia or others to save billions that way.
Is all the IP they acquired with Nuvia[1] tainted? Or were they just using ARM-derived internals?
From my understanding, just slapping on a different instruction decoder isn't a big technical hurdle. Actually, I wonder if it would be possible to design a chip with both an ARM and a RISC-V decoder on the same die and just fuse-off the ARM die on select units to avoid any fees...
[1] https://en.wikipedia.org/wiki/Qualcomm#2015%E2%80%932024:_NX...