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A comment on Beating Google's kernelCTF PoW using AVX512. Parent comment

Re:Beating Google's kernelCTF PoW using AVX512 by pittma on Friday May 30, 2025 @03:21PM (#44139164)
ymms were used here on purpose! With full-width registers, the IFMA insns have a deleterious effect on frequency, at least in the Icelake timeframe.
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Re:Beating Google's kernelCTF PoW using AVX512 by anematode on Friday May 30, 2025 @03:37PM (#44139296)
Ye, hence a separate version for CPUs which don't have that problem. Although, maintaining so many of these RSA kernels does seem like a pain. Didn't realize u wrote that code; super cool that it's used in practice!
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Re:Beating Google's kernelCTF PoW using AVX512 by pittma on Friday May 30, 2025 @03:43PM (#44139349)
I am not the original author—this is adapted from an implementation by Shay Gueron, the author of that paper I linked, but I do agree that it's cool!
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Re:Beating Google's kernelCTF PoW using AVX512 by hnuser123456 on Friday May 30, 2025 @09:15PM (#44141186)
zen5 can run avx512 at near full boost clocks: https://chipsandcheese.com/p/zen-5s-avx-512-frequency-behavi...
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