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A comment on A FPGA friendly 32 bit RISC-V CPU implementation. Parent comment

Re:A FPGA friendly 32 bit RISC-V CPU implementation by IshKebab on Monday January 27, 2025 @04:29AM (#42839095)
Ah no I found it: https://github.com/fabianschuiki/llhd

It does seem to be part of CIRCT in some way though. Maybe it inspired FIRRTL or something. Slightly unclear relationship between the projects!

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