The Zynq 7010 is less-than-ideal for this because you'd have to use some kind of USB3 interface PHY - which would increase cost and be pretty limited functionality-wise.
If you use an FPGA with transceivers (some 7 series Artix chips - https://www.lcsc.com/product-detail/Programmable-Logic-Devic..., most 7 series Virtex/Kintex chips, all US/US+ chips), you can implement USB3 without an external PHY: https://github.com/enjoy-digital/usb3_pipe
The Z7010 probably has the area to do this type of translation but not the transceivers. There are other chips in the 7 series Zynq family with capable transceivers, but they are much more expensive ($15-$35 from CN).
> I was under the impression the PIO has fairly precise timing if you set up your clocks right, but maybe I've been misled here.
No measured data, but when I was once implementing JTAG and SPI at 50MHz+ with an extremely overclocked chip, the edges were very inconsistent in relation to each other and in pulse width - 5-15ns (estimating from memory, they were sloppy.)
PIO is very precise within its specified capabilities, this range is just very low compared to cheap FPGAs.
> PIO is very precise within its specified capabilities, this range is just very low compared to cheap FPGAs.
Good to know, I don't plan on pushing RP2040s to their limit any time soon. They're still excellent for lower speed projects.
I've always wanted to do an FPGA project but haven't looked seriously into where to start. Can the Zynq 7010 handle something like data transfer from a 4K image sensor to a USB 3 transceiver?
> PIO has extraordinarily sloppy timing
Do you have any data on this? I was under the impression the PIO has fairly precise timing if you set up your clocks right, but maybe I've been misled here.