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A comment on Memory Mapping an FPGA from an STM32. Parent comment

Re:Memory Mapping an FPGA from an STM32 by dmitrygr on Thursday July 25, 2024 @05:13PM (#41073473)
> 100K reads/writes of a 32-bit register

You'll hit almost no bugs if you keep accessing the same address in a loop. Lucky you :)

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Re:Memory Mapping an FPGA from an STM32 by azonenberg on Thursday July 25, 2024 @06:51PM (#41074290)
Yeah but again, we're talking about the FMC here not the OCTOSPI.

Have you hit issues with the FMC? From what other people are telling me, the OCTOSPI is full of land mines and the FMC is pretty decent. The worst errata I've encountered so far is two dummy clocks with CS# asserted at the end of a read burst.

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Re:Memory Mapping an FPGA from an STM32 by syntheticgate on Thursday July 25, 2024 @07:09PM (#41074398)
lol, I'm working on an FMC-FPGA interface at work right now and discovered this same chipselect behavior.
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Re:Memory Mapping an FPGA from an STM32 by azonenberg on Thursday July 25, 2024 @07:51PM (#41074656)
It's a documented errata, 2.6.1 on page 8 of ES0491.
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