Standard cells: Looking at individual gates in the Pentium processor

Re:Standard cells: Looking at individual gates in the Pentiu... by morsch on Monday July 08, 2024 @01:58AM (#40902916)

It's worse than that, isn't it? Not only are the algorithms presumably super linear, the transistor count has been increasing exponentially, but the compute power per transistor has been decreasing over time. See e.g. [1].

Although I suppose if the problem is embarrassingly parallel, the SpecINT x #cores curves might just about reach the #transistors curve.

[1] https://substackcdn.com/image/fetch/w_1272,c_limit,f_webp,q_... via https://www.semianalysis.com/p/a-century-of-moores-law figure 1

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Re:Standard cells: Looking at individual gates in the Pentiu... by kragen on Monday July 08, 2024 @04:58AM (#40903774)

yeah, that plots single-threaded performance, not total compute power. the point it's making is that now those transistors are going to parallelism rather than to single-threaded performance, and also the compute power per transistor stopped increasing around 02007 with the end of dennard scaling

your problem doesn't have to be ep to scale to 10² cores

i suspect it's true that compute power per transistor is dropping because thermal limits require dark silicon, but that plot doesn't show it

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