https://www.greenarraychips.com/
Apparently they had angel funding of some sort at some point.
I can see this chip being used instead of "system on chip" (SoC) designs. Namely GA144 + a general purpose processor (if the "business logic" of the application is too large/complicated for a GA144).
When you look at typical ARM-based SoCs, a lot of the integrated controllers are just bit-banging stuff from and to peripherals. But this is all carved in silicon, and to maximize flexibility you have a lot of additional complexity (both for the chip and the programmer) for configuration. Plus, because those chips are often used in mobile computing, you have a lot of complexity to power up and down unused parts.
It seems to me that a GA144 or two, you have more flexibility (because it's all software) and low-power usage (due to its design). What this chip probably needs is libraries to talk to common peripherals (I2C, SPI, SSC, SD card controlers, LCD controlers, flash controllers...).
A quick history of this work is contained in this thesis by Charles Eric LaForest.
http://fpgacpu.ca/publications/Second-Generation_Stack_Compu...
Forth is not a language. It's an extensible instruction set. You like RISC. Are 31 instructions "RISCy" enough? :-)
I have wondered what Chuck's CPU designs could have become if they had been given more financial and intellectual support at the level that we see for the dominant machines in the world.
Chuck's first CPU NOVIX 2000, performed multiple instructions per clock without pipelining, Interrupt handling in 2 clocks, sub-routine calls in 1 clock and return was 0 clocks on many instructions. That was done with a ridiculously small number of gates.
In later years Chuck realized that a dogmatic use of only the data stack was not ideal and he added an a address register and a loop counter register to make the machines faster.
It would be cool to see someone carry these concepts forward to see what's possible.