Re:TSMC unveils 1.6nm process technology with backside power...
by zeusk on Thursday April 25, 2024 @08:29PM
(#40164675)
BSPDN is not about putting devices on the front and back, the logic layer is still mostly 2D, it's about the power connects moving to the back of the chip so there's less interference with logic and larger wiring can be used.
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