Ironically, USB SS is more implementable than USB HS without a dedicated PHY. USB SS's PHY is just standard CML differential signaling used for almost all modern high-speed protocols like PCIe or SATA (but with an LFPS extension for link negotiation), most FPGAs already have built-in support for it. Meanwhile USB HS's PHY is a completely non-standard one: it's LVDS-like but the signals are not fully differential, it's half-duplex and needs bus arbitration, etc - only USB HS PHYs speak this odd language.