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Re:PCIe 7.0 Draft 0.5 Spec: 512 GB/s over PCIe x16 On Track ... by georgeburdell on Thursday April 04, 2024 @01:28PM (#39933434)
PAM4 allows the frequencies involved to stay close to the same, at the expense of higher required precision in other parts of the transmit/receive chains, so they didn’t “just double the frequency”
Re:PCIe 7.0 Draft 0.5 Spec: 512 GB/s over PCIe x16 On Track ... by Kirby64 on Thursday April 04, 2024 @01:54PM (#39933763)
But they literally did. FTA:

>> To achieve its impressive data transfer rates, PCIe 7.0 doubles the bus frequency at the physical layer compared to PCIe 5.0 and 6.0. Otherwise, the standard retains pulse amplitude modulation with four level signaling (PAM4), 1b/1b FLIT mode encoding, and the forward error correction (FEC) technologies that are already used for PCIe 6.0.

Nothing else changed, they didn't move to a different encoding scheme. PCIe 6.0 already uses PAM4. Unless they moved to a higher density PAM scheme (which they didn't), the only way to increase bandwidth is to increase speed.

Re:PCIe 7.0 Draft 0.5 Spec: 512 GB/s over PCIe x16 On Track ... by Dylan16807 on Thursday April 04, 2024 @11:46PM (#39938505)
That was gen 6 and only gen 6. Every other generation doubled the frequency.