Re:Launch HN: SiLogy (YC W24) – Chip design and verification...
by karthityrion on Thursday March 07, 2024 @02:36PM
(#39633618)
I might be missing something but how does the product reduce verification time? Isn't it just Verilator running on a cloud server? How does it help with debugging?
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Re:Launch HN: SiLogy (YC W24) – Chip design and verification...
by pkkim on Thursday March 07, 2024 @03:38PM
(#39634314)
Hey, good question, thanks.
We speed up developers in two ways: For debugging individual tests, we have a web based log viewer and web based waveform viewer, so you can share test results or look at waves via a URL, instead of opening VNC. More holistically, we're building a chip focused workflow that will make tests first class -- infrastructure to track tests, and by extension measure design health, will be in one place, instead of implemented with a bunch of handrolled, bespoke tooling.
Re:Launch HN: SiLogy (YC W24) – Chip design and verification...
by karthityrion on Thursday March 07, 2024 @04:07PM
(#39634585)
Thank you! So will it be a web-based wave viewer and debugger?