karthityrion
Re:Launch HN: SiLogy (YC W24) – Chip design and verification in the cloud
on Thursday March 07, 2024 @04:07PM (#39634585)
Thank you! So will it be a web-based wave viewer and debugger?
Re:Launch HN: SiLogy (YC W24) – Chip design and verification in the cloud
on Thursday March 07, 2024 @02:36PM (#39633618)
I might be missing something but how does the product reduce verification time? Isn't it just Verilator running on a cloud server? How does it help with debugging?
Re:Groq runs Mixtral 8x7B-32k with 500 T/s
on Monday February 19, 2024 @01:42PM (#39433163)
So, is this specific chip only for LLMs as the name LPU suggests Language Processing Unit, right?
Re:Groq runs Mixtral 8x7B-32k with 500 T/s
on Monday February 19, 2024 @01:36PM (#39433119)
What is the underlying architecture of the ASICs. Does it use systolic arrays?
Re:Groq runs Mixtral 8x7B-32k with 500 T/s
on Monday February 19, 2024 @01:04PM (#39432758)
Hi. Are these ASICs only for LLMs or could they accelerate other kinds of models(vision) as well?