>Therefore, we decided, in similar fashion as Ledger’s scaffold, to make our own custom board where all the relevant signals are routed to dedicated pins.
Explaination or theory: someone else did it the same way.
>Throughout our research we used two acquisition techniques that are supported by our oscilloscope: normal block mode and rapid block mode. We used Picoscope’s Python bindings to communicate with the oscilloscope. We used their ps3000aRapidBlockExample.py as a reference to integrate rapid block mode into Riscure’s FiPy.
Sounds like they used what worked on their hardware.
Part 1: https://eprint.iacr.org/2023/090 How to break ESP32 AES with power analysis
Part 2: https://courk.cc/breaking-flash-encryption-of-espressif-part... How to do it for no more than $100
Part 3: This article Improving the performance
There wasn’t even a discussion on why the particular AES configuration deployed was used or how it affects the process.