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A comment on Major Changes at RISC-V Designer SiFive. Parent comment

Re:Major Changes at RISC-V Designer SiFive by londons_explore on Tuesday October 24, 2023 @08:04AM (#37997920)
I would like to also have aligned 16 bit instructions. And maybe even aligned 8 bit instructions for very common things like "decrement register 0" or "test if register 0 is greater than or equal to zero". "Jump back by 10 instructions", etc. Those instructions get widely used in tight loops, so might as well be smaller.
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Re:Major Changes at RISC-V Designer SiFive by adgjlsfhk1 on Tuesday October 24, 2023 @09:00AM (#37998579)
8 bit instructions are a really bad idea. you only get a tiny number of them and they significantly increase decode complexity (and massively reduce the number of larger instructions available)
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