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Re:Major Changes at RISC-V Designer SiFive by camel-cdr on Tuesday October 24, 2023 @06:39AM (#37997094)
I think James comment summaries the problem quite well, as both aises have segnificant self interest/sunk cost for their prefered approach: https://lists.riscv.org/g/tech-profiles/topic/rva23_versus_r...
Re:Major Changes at RISC-V Designer SiFive by londons_explore on Tuesday October 24, 2023 @07:21AM (#37997447)
I'm not sure either side has all that much sunk cost. So far, there isn't much binary RISC-V code thats distributed in binary form and expected to run on future processors.

So far, nearly all RISC-V is in the embedded space where everything is compiled from scratch, and a change to the ISA wouldn't have a huge impact.

Far more important to get it right for RISC-V phones/laptops/servers, where code will be distributed in binary form and expected to maintain forward and back CPU compatibility for 10+years.

Re:Major Changes at RISC-V Designer SiFive by Narishma on Tuesday October 24, 2023 @08:11AM (#37998006)
The sunk cost here I think refers to the existing CPU designs of the respective camps. Qualcomm's ARM-based cores don't support an equivalent of the C extension and adding it would presumably require major and expensive rework.
Re:Major Changes at RISC-V Designer SiFive by phkahler on Tuesday October 24, 2023 @10:28AM (#37999631)
>> This is basically what qualcomm proposes, 32 bit instructions and 64 bit aligned 64 bit instructions.

Well that's only sunk cost if they assumed from the start that they were going to change the design to RISC-V AND drop the C extension. In that case, it was a rather risky plan from the start - assuming they can shift the industry like that. I'm guessing RISC-V was a change of direction for them and this would make things easier short term.

Re:Major Changes at RISC-V Designer SiFive by dezgeg on Tuesday October 24, 2023 @09:27AM (#37998898)
Debian has already started compiling it, and even more will be by the time this new incompatible ISA would hit the shelves.

The time to 'get it right' has already passed IMO. If a hard ISA compatibility break happens at this stage, who is going to trust that it won't happen again?

Re:Major Changes at RISC-V Designer SiFive by doublepg23 on Tuesday October 24, 2023 @10:05AM (#37999341)
Can’t Debian just recompile it? I think that was OPs point. We’re not at a place yet where _only_ binaries are floating around we have all the source code for these applications.
Re:Major Changes at RISC-V Designer SiFive by fwsgonzo on Tuesday October 24, 2023 @10:27AM (#37999626)
Reading through this thread, I think that if the conclusion is to disallow misaligned 16-bit instructions, then not much has to happen.You technically only need to relink the programs to fix that issue.

The question is really about how far do they want to go beyond just disallowing page-crossing / cacheline-crossing instructions.

Personally, I always thought the C extension would have been much easier to implement if it had certain rules about it. Imagine looking at a random location in memory, how can you tell where instructions begin and end? You can't.

Re:Major Changes at RISC-V Designer SiFive by Narishma on Tuesday October 24, 2023 @08:04AM (#37997922)
So basically RVA is like UTF-8 and the proposed RVH will be like UTF-32?