IMHO ARM is one of the best things that ever happened in the computer industry.

> non-toxic IP cores with enough performance from RISC-V

Why would anyone also their designs to be used for free or for cheaper than ARM does?

Competition. Multiple vendors can compete with RISC-V while ARM can prevent all competition with licenses, if it really will happen is a different case, but I'm optimistic about the potential.

Possibly, but historically it high end semiconductors seem to turn into a winner takes all market more often than not. If that’s the case it’s probably preferable to have someone like ARM at the top than Intel or Nvidia.

nope, it is would be better if it was RISC-V.

Why (besides religious reasons)?

I don’t see how can high-end/competitive RISC-V cores could be fully open/free and without that how is it better than ARM.

There is nothing religious here.

arm and x86 are not royalty free ISAs, RISC-V is, then RISC-V is mechanically a better choice, until it does a good enough job.

>and without that how is it better than ARM.

Only ARM can license ARM cores to others.

Using RISC-V, any company who can design their own cores can also offer them for licensing.

There's already tens of companies offering hundreds of cores for licensing.

This is much better than ISA-enforced vendor lock-in, which is the situation with x86 and ARM.

It's winner take all in a competitive scenario, maybe. Winner is all is what RISC-V is trying to make happen.

Most people want to build things not cores, the cores aren't the core competency. So the hope is, release what cores you have & let others improve it for you. Western Digital's swer-v core is seemingly an example of this thinking.

Would you not expect companies which actually want to make to cores to have an advantage?

And the companies that don’t want to make it their core business but can afford enough resources (e.g. Google, Apple, Amazon) would just use them to leverage their core products.

I could only see this on the lower end where margins/required R&D investment are relatively low.

I expect going it alone will get totally owned by everyone else working together.

There's a lot to be said for open source ISAs like RISC-V. But it's a lot harder to create a top of the line open source microarchitecture implementing it that's competitive to closed source designs. A Linux kernel developer can make changes and test them several times a day for a cost in electricity measured in cents. An equivalent build/test cycle on a CPU core is going to be north of a month and a million dollars. Simulation helps but to optimize speed and yield you really need to build the chips and due to physical effects that's a process with much weaker abstraction barriers than software development. So I'm skeptical that we'll ever have cutting edge open source microarchitectures.

I am not talking about open source architecture, but more about a worldwide non-toxic ISA: namely anybody can create FREELY a RISC-V microarchitecture AT WORLWIDE SCALE, and that closed or open, which you cannot with arm or x86.

Ofc, worldwide royalty free is not enough (or just be allowed to implement the ISA...), silicium is really about performance, and I sincerely hope RISC-V will end up providing microarchitectures (open or not) "good enough" to do the job.

I am perfectly aware RISC-V will fail if not providing at scale really good implementations. Rumors say "really performant" implementations are not expected before 2024.

> namely anybody can create FREELY a RISC-V microarchitecture AT WORLWIDE SCALE

The problem with this argument is that it ignores the cost of creating the microarchitecture. It’s almost certainly cheaper to license an Arm A series core than to create a comparable RISC-V core from scratch.

Sure we have a firm like SiFive that licenses RV cores to third parties but the existence of firms like Arm and SFive shouldn’t be taken for granted. If rumour has it SiFive were almost taken over by Intel. Thankfully Nvidia were stopped from buying Arm.

If you wish for Arm’s demise you may get the end of their business model and that probably isn’t a great outcome.

risc-v is not limited to sifive, there are several other implementations. And yes, arm and x86 made angry ppl with enough resources to make happen risc-v, and it has been a decade and it is still gaining momentum even if the market is over-saturated with arm and x86. That's last point is really positive, and it allows us to think risc-v could be successful.

But I agree that without _REALLY_ performant implementations, risc-v WILL fail and rumors say that things won't start to get serious before 2024. Nevertheless, in its current state, failure is still a more than valid outcome.

>rumors say that things won't start to get serious before 2024.

What is interesting imho is that they WILL get serious by 2024, including P670, Veyron, Ascalon. All of them seem to implement RVA22 + ratified V.

This is a very fast timeline for RISC-V, which privileged spec was only ratified in 2019.

It all has been happening much faster than even the most optimistic estimates were.

A word of caution: until the "performance" is actually here, better stay humble.

As far as I know and specs wise, RISC-V has been kind of ready for a while, only missing very high performance implementations.

My first real risc-v target is a 100% RV64 assembly keyboard firmware though. Looking at mango pi pro mq boards, but I wish we had 'smaller' RV64 GPIO/USB boards for that, maybe a small GPIO/USB board with a USB block+FPGA with enough gates to instance a small RV64 core.

I see RISC-V as a time bomb.

These are known "detonators" set up for next year. There's more we don't even know of. It is going to happen.

RISC-V is inevitable.

>As far as I know and specs wise

December 2021's batch of extensions done the magic. No hardware out there implements them.

Once it arrives (e.g. Veyron and Ascalon), the thorough disruption of the whole CPU landscape, from microcontrollers to supercomputers, starts.

The acceleration and massive momentum that we've seen to date is nothing compared to what's to come.

I think this may be a bit too many instructions (I did not see hardware accelerated memcpy/memset though). I guess I would use only a small subset of them. Since RISC-V is a royalty free standard, writting directly assembly is worth it, until the abuse of a macro processor and code generation is avoided.

I want to share you optimism, but I advise you to keep your cool. There is a long road to reach the performance of x86/arm microarchitectures (it is harder for risc-v since the "market is over saturated"). And those performant implementations must get access to the best silicium node process... and that...

Veyron and Ascalon's planned releases aren't "IP to license" releases, but actual chips.

Veyron's supposed to have actual server boards on sale late this year.

Ascalon, CPU chiplets and a full AI accelerator product using them, succeeding their current one, which iirc uses SiFive IP.