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Re:432-Core RISC-V European Processor Designed for Use in Sp... by pavlov on Tuesday May 09, 2023 @11:37AM (#35876005)
Which is nice, but doesn't really answer my question?

There's a tremendous usability difference between "X flops and all the different types of cores can read and write to unified memory with cache coherence" (as on Apple Silicon) vs. "X flops but you need to carefully orchestrate chunks of data in and out of local scratchpad buffers" (as on the Cell).

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