Re:iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure
by kjs3 on Friday April 07, 2023 @11:49PM
(#35490358)
My point was there was more than one way of solving the problem (economically optimized or not), and having custom width memory silicon wasn't the only answer. But sure, if you move the goalpost around enough you get to be right.
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