AMD and Jedec Are Collaborating on DDR5 MRDIMMs at a Blistering 17,600 MT/S

Re:AMD and Jedec Are Collaborating on DDR5 MRDIMMs at a Blis... by yazaddaruvala on Thursday April 06, 2023 @03:28PM (#35473223)

Thanks, this is what I'd love to understand better.

At the highest level isn't it all EUV? Why can't the laser print both patterns onto the wafer?

[ Parent | on HN ]

Re:AMD and Jedec Are Collaborating on DDR5 MRDIMMs at a Blis... by realjhol on Friday April 07, 2023 @04:06AM (#35479361)

A CMOS chip doesn't contain any capacitors. DRAM is made of capacitors, and thus has a radically different structure.

[ Parent | on HN ]