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A comment on Verilog Ethernet: Work-in-Progress 100BASE-TX PHY. Parent comment

Re:Verilog Ethernet: Work-in-Progress 100BASE-TX PHY by Aromasin on Friday March 17, 2023 @12:16PM (#35199088)
Intel have Hard IP in their Stratix/Agilex parts. They've got integrated PCS and PMA in their dedicated transceiver tiles. Agilex supports 10G to 400G too.
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