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A comment on Verilog Ethernet: Work-in-Progress 100BASE-TX PHY. Parent comment

Re:Verilog Ethernet: Work-in-Progress 100BASE-TX PHY by gorkish on Friday March 17, 2023 @10:55AM (#35197898)
The OpenHPSDR project implements a good chunk of basic networking without a soft core at 100mbps and 1gbps; ARP, DHCP, and UDP are in there. TCP is not implemented.
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