Re:Analyzing the complexity of various RISC/CISC architectures
by Gibbon1 on Sunday January 01, 2023 @05:41AM
(#34205285)
I think the issue is due to the way modern memory architectures work alignment restrictions don't buy you much. In particular because memory accesses suck in a whole cache line. As long as all the data is in the cache line it's easy enough to swap bytes around on the fly.
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