Update: The lack of symmetry [with respect to which way round the transistor is used, as opposed to structural symmetry] is primarily due to the doping ratios of the emitter and the collector. The emitter is heavily doped, while the collector is lightly doped, allowing a large reverse bias voltage to be applied before the collector–base junction breaks down. The collector–base junction is reverse biased in normal operation. The reason the emitter is heavily doped is to increase the emitter injection efficiency: the ratio of carriers injected by the emitter to those injected by the base. For high current gain, most of the carriers injected into the emitter–base junction must come from the emitter.
https://en.wikipedia.org/wiki/Bipolar_junction_transistor#St...
1. http://www.circuitstoday.com/monolithic-ic#monolithic-fabric...
> The idealized drawing of a BJT might imply that it should be a bidirectional device, working equally well if you reverse the polarity of the collector and the emitter. In practice, the emitter region is usually doped more heavily to facilitate the transport of electrons in one direction, so reversing the component leads to compromised performance.
If you've worked with them at all, you know that bipolar junction transistors are not symmetric -- if you put them in your circuit with the collector and the emitter reversed, then they don't behave the same as if you put them in the right way. Hobbyists know that the schematic-diagram symbol always has the arrow on the base-emitter leg, and the arrow points from P to N.
But the BJT diagram in this article and in elementary textbooks is symmetric -- there's no physical structural difference between the collector and the emitter in the picture.
This isn't necessarily bad, simplifying the problem to illustrate the fundamentals is a legitimate pedagogical technique.
The "obvious" question is, what else is going on in real devices?
I think the answer is that actual commercially-available discrete BJTs are fabricated on a planar substrate, the same way they're done for integrated circuits, and then cut out of the wafer and packaged for individual use. In this process, the collector (I think?) is generally the lowest layer on the wafer, and is much larger than the emitter, which is on top, and is generally much smaller. In the planar case, there's an obvious geometric asymmetry that explains the device's asymmetric behavior.
I'm not 100% solid on that explanation, and I don't recall where I saw it, but this is the kind of next-level detail that I would have liked to see from the article.
(Minor edits for clarity.)